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<title>Professor Lei Wang</title>
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<p class=”MsoNormal” style=”margin-top: 0; margin-bottom: 0″><b>
<font size=”4″> Lei Wang </font></b><font size=”4″><br>
</font><font size=”3″> F. L. Castleman Associate Professor in Engineering Innovation<br>
Department of Electrical & Computer Engineering <br>
University of Connecticut</font></p>
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<font size=”3″> 371 Fairfield
Road U-4157</font></p><br>
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<font size=”3″> Storrs, CT
06269, USA
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<font size=”3″> Tel:
860-486-3066 </font> </p>
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<font size=”3″> Fax:
860-486-2447 <br>
E-Mail: <a href=”mailto:lei.3.wang@uconn.edu” class=”contentAreaLinks”><font color=”#000000″>lei.3.wang@uconn.edu</font></a><br>
Office: ITE 455</font></td>
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<p align=”justify”>Lei Wang received the B.S. degree and the M.S. degree from Tsinghua University,
China, in 1992 and 1996, respectively, and the Ph.D. degree from the University of Illinois at Urbana-Champaign
in 2001.
<p align=”justify”>During the summer of 1999, Dr. Wang worked at Microprocessor Research Laboratories,
Intel Corporation, in Hillsboro, OR, where his work involved development of high-speed and noise-tolerant
VLSI circuits and design methodologies. From December 2001 to July 2004, he was with Microprocessor
Technology Laboratories, Hewlett-Packard Company, in Fort Collins, CO, where he participated in the design
of the first dual-core multi-threaded Itanium® Architecture Processor, a joint project between Intel and Hewlett-Packard.
Since August 2004, he has been with the Department of Electrical and Computer Engineering, University of Connecticut, where he
is currently a Francis L. Castleman Associate Professor.
<p align=”justify”>Dr. Wang is a recipient of the National Science Foundation CAREER Award.
He is a member of IEEE Signal Processing Society Technical Committee on Design and Implementation of Signal Processing Systems.
He has been serving as a Senior Area Editor for the IEEE Signal Processing Letters since 2014,
and on the Steering Committee of the IEEE Transactions on Multi-Scale Computing Systems.
He served as an Associate Editor for the IEEE Transactions on Computers from 2010 to 2014, and an Associate Editor for the IEEE Signal Processing Letters from 2012 to 2014. He also served as
a Guest Editor for the IEEE Transactions on Emerging Topics in Computing and a Guest Editor for the Springer Journal of Signal Processing Systems.
Dr. Wang is a Senior Member of IEEE.
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<hr>
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<h3>Education</h3>
<ul type=”disc” style=”margin-bottom: 0in”>
<li class=”MsoNormal”>PhD, University of Illinois at Urbana-Champaign, 2001</li>
<li class=”MsoNormal”>MS, Tsinghua University, Beijing, China, 1996</li>
<li class=”MsoNormal”>BS, Tsinghua University, Beijing, China, 1992</li>
</ul>
<h3>Appointments</h3>
<ul type=”disc” style=”margin-bottom: 0in”>
<li class=”MsoNormal”>Associate Professor, University of Connecticut, 2010-present</li>
<li class=”MsoNormal”>Assistant Professor, University of Connecticut, 2004-2010</li>
<li class=”MsoNormal”>Member of Technical Staff, Microprocessor Technology Laboratories, Hewlett-Packard Company, 2001-2004</li>
</ul>
<h3>Research</h3>
<ul type=”disc” style=”margin-bottom: 0in”>
<li class=”MsoNormal”>Self-sustained cyber-physical/aquatic systems</li>
<li class=”MsoNormal”>Embedded signal processing/computing with renewable energy</li>
<li class=”MsoNormal”>Performance limits and optimization for nano/molecular systems</li>
<li class=”MsoNormal”>VLSI circuits and systems for low power, high performance, variation tolerance, and hardware security</li>
<p><align=”justify”><h3>We gratefully acknowledge the support from the following agencies and companies.</h3></p>
<img border=”0″ src=”sponsors.jpg” width=”977″ height=”100″>
</ul>
<h3>Selected Publications (<a style=”color: black; text-decoration: underline; text-underline: single” href=”http://www.engr.uconn.edu/~leiwang/publications/index.html”>FULL LIST</a>)
</h3>
<ul>
<li class=”MsoNormal”> Z. Xu, Y. Liu, I. Williams, Y. Li, F. Qian, H. Zhang, D. Cai, L. Wang, and B. Li, "Disposable self-support paper-based multi-anode microbial fuel cell (PMMFC) integrated with power management system (PMS) as the real time “shock” biosensor for wastewater," <i>
Biosensors and Bioelectronics</i> (Impact Factor: 6.409), accepted as a regular paper.</li>
<li class=”MsoNormal”> J. Chen and L. Wang, "Energy-adaptive signal processing under renewable energy," <i>Springer Journal of Signal Processing Systems</i>, vol. 84, pp. 399-412, November 2015.</li>
<li class=”MsoNormal”> J. Dai, M. Guan, and L. Wang, "Exploiting early tag access for reducing L1 data cache energy in embedded processors," <i>
IEEE Transactions on VLSI Systems</i>, vol. 22, pp. 396-407, February 2014.</li>
<li class=”MsoNormal”> L. Wang, F. Jain, and F. Lombardi, "Information-theoretic modeling and analysis of stochastic behaviors in quantum-dot cellular automata," <i>
Cellular Automata</i>, InTech, 2011.</li> <li class=”MsoNormal”> S. Wang and L. Wang, "Exploiting memory soft redundancy for joint improvement of error tolerance and access efficiency," <i>
IEEE Transactions on VLSI Systems</i>, vol. 17, pp. 973-982, August 2009.</li>
<li class=”MsoNormal”> J. Dai, L. Wang, and F. Jain, "Analysis of defect tolerance in molecular crossbar electronics," <i>
IEEE Transactions on VLSI Systems</i>, vol. 17, pp. 529-540, April 2009.</li>
<li class=”MsoNormal”> L. Wang and N. Patel, "Improving error tolerance for multithreaded register files," <i>
IEEE Transactions on VLSI Systems</i>, vol. 16, pp. 1009-1020, August 2008.</li>
<li class=”MsoNormal”> J. Dai and L. Wang, "Way-tagged cache: an energy-efficient L2 cache architecture under write-through policy,"
<i> Proc. of IEEE International Symposium on Low Power Electronics and Design (ISLPED)</i>, 2009, pp. 159-164. <B>(Best Paper Award nomination)</B></li>
<li class=”MsoNormal”> E. Fetzer, L. Wang, and J. Jones, "The multi-threaded, parity protected, 128 word register
files on a dual-core Itanium® Family Processor,"
<i>Proc. IEEE International Solid-State Circuits Conference (ISSCC)</i>, 2005, pp. 382-383.</li>
<li class=”MsoNormal”>
L. Wang and N. R. Shanbhag, "Energy-efficiency bounds for deep submicron VLSI systems in the presence of noise," <i>
IEEE Transactions on VLSI Systems</i>, vol. 11, pp. 254-269, April 2003.</li>
<li class=”MsoNormal”>
L. Wang and N. R. Shanbhag, "Low-power filtering via adaptive error-cancellation," <i>
IEEE Transactions on Signal Processing</i>, vol. 51, pp. 575-583, February 2003.</li>
</ul>
<h3>Patents (<a style=”color: black; text-decoration: underline; text-underline: single” href=”http://www.engr.uconn.edu/~leiwang/patents/index.html”>FULL LIST</a>)</h3>
<ul>
<li class=”MsoNormal”>
L. Wang, "Error-tolerant multi-threaded memory systems with reduced error accumulation," US Patent 8190982, 2012.
<li class=”MsoNormal”>
L. Wang, "Energy efficient clock deskew systems and methods," US Patent 7576580, 2009.
<li class=”MsoNormal”>
L. Wang and E. Fetzer, "Receiver and method for mitigating temporary logic transitions," US Patent 7200821, 2007.
</ul>
<h3>Teaching</h3>
<ul type=”disc” style=”margin-bottom: 0in”>
<li class=”MsoNormal”>ECE4901/4902, Electrical and Computer Engineering Design</li>
<li class=”MsoNormal”>ECE2001W, Electrical Circuits</li>
<li class=”MsoNormal”>ECE3421, VLSI Design and Simulation</li>
<li class=”MsoNormal”>ECE3431, Numerical Methods in Scientific Computation</li>
<li class=”MsoNormal”>ECE4401, Digital Design Laboratory</li>
<li class=”MsoNormal”>ECE6095, Introduction to Nano/Molecular Computing</li>
</ul>
<h3>Professional Services</h3>
<ul type=”disc” style=”margin-bottom: 0in”>
<li class=”MsoNormal”>Steering Committee, IEEE Transactions on Multi-Scale Computing Systems</li>
<li class=”MsoNormal”>Senior Area Editor, IEEE Signal Processing Letters</li>
<li class=”MsoNormal”>Associate Editor, IEEE Transactions on Computers, 2012-2014</li>
<li class=”MsoNormal”>Associate Editor, IEEE Signal Processing Letters, 2012-2014</li>
<li class=”MsoNormal”>Guest Editor, IEEE Transactions on Emerging Topics in Computing</li>
<li class=”MsoNormal”>Guest Editor, Springer Journal of Signal Processing Systems</li>
<li class=”MsoNormal”>Member of IEEE Signal Processing Society Technical Committee on Design and Implementation of Signal Processing Systems</li>
<li class=”MsoNormal”>Special Session Chair, IEEE Workshop on Signal Processing Systems (SiPS’13)</li>
<li class=”MsoNormal”>Track Chair, VLSI Circuits, ACM Great Lakes Symposium on VLSI (GLSVLSI’09, GLSVLSI’10, GLSVLSI’11, GLSVLSI’12, GLSVLSI’13, GLSVLSI’14, GLSVLSI’15, GLSVLSI’16)</li>
<li class=”MsoNormal”>Review Committee Member, IEEE International Symposium on Circuits and Systems (ISCAS’11, ISCAS’12, ISCAS’13, ISCAS’14, ISCAS’15)</li>
<li class=”MsoNormal”>Review Committee Member, IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP’13, ICASSP’14, ICASSP’15, ICASSP’16)</li>
<li class=”MsoNormal”>TPC Member, IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED’13, ISLPED’14, ISLPED’15)</li>
<li class=”MsoNormal”>TPC Member, Asia and South Pacific Design Automation Conference (ASP-DAC’13, ASP-DAC’14)</li>
<li class=”MsoNormal”>TPC Member, IEEE Global Conference on Signal and Information Processing: Software Defined and Cognitive Radios (GlobalSIP’13)</li>
<li class=”MsoNormal”>TPC Member, IEEE Workshop on Signal Processing Systems (SiPS’12, SiPS’13, SiPS’14)</li>
<li class=”MsoNormal”>TPC Member, IEEE International Conference on Computer Design (ICCD’10)</li>
<li class=”MsoNormal”>TPC Member, IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH’09, NANOARCH’10, NANOARCH’12, NANOARCH’13, NANOARCH’14, NANOARCH’15)</li>
<li class=”MsoNormal”>TPC Member, IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’08, DFT’09, DFT’10, DFT’11, DFT’12, DFT’13, DFT’14, DFT’15)</li>
<li class=”MsoNormal”>TPC Member, IEEE International SOC Conference (SOCC’07, SOCC’08, SOCC’09, SOCC’10, SOCC’12, SOCC’13, SOCC’14, SOCC’15)</li>
<li class=”MsoNormal”>TPC Member, IEEE International Symposium on Quality Electronic Design (ISQED’06, ISQED’07, ISQED’08, ISQED’09, ISQED’10, ISQED’11, ISQED’12, ISQED’13, ISQED’14, ISQED’15)</li>
<li class=”MsoNormal”>TPC Member, ACM Great Lakes Symposium on VLSI (GLSVLSI’06, GLSVLSI’07, GLSVLSI’08, GLSVLSI’09, GLSVLSI’10, GLSVLSI’11, GLSVLSI’12, GLSVLSI’13, GLSVLSI’14, GLSVLSI’15, GLSVLSI’16)</li>
<li class=”MsoNormal”>TPC Member, International Symposium on Electronic System Design (ISED’10, ISED’11, ISED’12)</li>
<li class=”MsoNormal”>TPC Member, International Congress on Image and Signal Processing (CISP’10)</li>
<li class=”MsoNormal”>TPC Member, International Workshop on Unique Chips and Systems (UCAS’11, UCAS’12)</li>
</ul>
<h3>Students
</h3>
<ul type=”disc” style=”margin-bottom: 0in”>
<li class=”MsoNormal”>Wenjie Huang, PhD</li>
<li class=”MsoNormal”>Fengyu Qian, MS/PhD</li>
<li class=”MsoNormal”>Shuai Chen, MS/PhD</li>
<li class=”MsoNormal”>Yanping Gong, MS/PhD</li>
</ul>
<h3>Former Graduate Students
</h3>
<ul type=”disc” style=”margin-bottom: 0in”>
<li class=”MsoNormal”>Shuo Wang, PhD, currently with Qualcomm</li>
<li class=”MsoNormal”>Jianwei Dai, PhD, currently with Intel</li>
<li class=”MsoNormal”>Weiguo Tang, PhD, currently with Broadcom</li>
<li class=”MsoNormal”>Guoxian Huang, PhD, currently with ASML</li>
<li class=”MsoNormal”>Junlin Chen, PhD, currently with Unicore Communications</li>
<li class=”MsoNormal”>Ridvan Umaz, PhD, currently a faculty member with Bitlis Eren University, Turkey.</li>
<li class=”MsoNormal”>Niral Patel, MS, currently with HistoRx</li>
<li class=”MsoNormal”>Shruti Khare, MS, currently with IBM</li>
<li class=”MsoNormal”>Dong Zhao, MS, currently with Amazon</li>
<li class=”MsoNormal”>Menglong Guan, MS, currently with ASML</li>
</ul>
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